AT&T 3B20 Processor and Dual Multi-Environment Real Time (DMERT) Real Time Reliable (RTR) Operating System

Books

1. Computer Hardware/Software Architecture; Wing Toy and Benjamin Zee; Prentice-Hall, 1986:

            Section 6.9.2: Synchronization in the DMERT Operating System
            Section 6.11.2: Interprocess Communication in the DMERT Operating
                             System
            Section 6.13.2: Processor Management in the 3B20D/DMERT System
            Section 6.14.1: Architectural Support for ATB Miss Processing in
                             3B20D
            Chapter 9: AT&T 3B20D Processor
   

Periodical Articles and Conference Papers

1. "Inside the 3B-20 Processor", BLR 59:3 Mar 1981 pgs 66-71.
    
2. Issue of The Bell System Technical Journal on The 3B20D Processor & DMERT Operating System, BSTJ 62:1:2 Jan 1983.
    
3. "3B20D/DMERT: Prologue", BSTJ 62:1:2 Jan 1983 pgs 167-169.
    
4. "The 3B20D Processor & DMERT as a Base for Telecommunications Applications", BSTJ 62:1:2 Jan 1983 pgs 171-179.
    
5. "Overview and Architecture of the 3B20D Processor", BSTJ 62:1:2 Jan 1983 pgs 181-190.
    
6. "3B20D Central Processing Unit", BSTJ 62:1:2 Jan 1983 pgs 191-206.
    
7. "3B20D Processor Memory Systems", BSTJ 62:1:2 Jan 1983 pgs 207-220.
    
8. "3B20D Packaging and Technology", BSTJ 62:1:2 Jan 1983 pgs 221-234.
    
9. "3B20D File Memory Systems, BSTJ 62:1:2 Jan 1983 pgs 235-254.
    
10. "3B20D Input/Output System", BSTJ 62:1:2 Jan 1983 pgs 255-273.
     
11. "3B20D/DMERT: Software Development System", BSTJ 62:1:2 Jan 1983 pgs 275-289.
     
12. "Overview, Architecture and Performance of DMERT", BSTJ 62:1:2 Jan 1983 pgs 291-301.
     
13. "DMERT Operating System", BSTJ 62:1:2 Jan 1983 pgs 303-322.
     
14. "3B20D/DMERT: Field Administration Subsystems", BSTJ 62:1:2 Jan 1983 pgs 323-339.
     
15. "3B20 Field Utilities", BSTJ 62:1:2 Jan 1983 pgs 341-348.
     
16. "3B20D/DMERT: Fault Detection and Recovery", BSTJ 62:1:2 Jan 1983 pgs 349-365.
     
17. "3B20D/DMERT: Diagnostic Tests and Control Software", BSTJ 62:1:2 Jan 1983 pgs 367-381.
     
18. "3B20D Craft Interface", BSTJ 62:1:2 Jan 1983 pgs 383-397.
     
19. "3B20D/DMERT: Integration and System Test", BSTJ 62:1:2 Jan 1983 pgs 399-410.
     
20. "Attached Processor System Gives No. 4 ESS More Processing Power", BLR 61:2 Feb 1983 pg 3.
     
21. "Expanding the Capabilities of the Traffic Service Position System", BLR 61:2 Feb 1983 pgs 22-27.
     
22. "Beefing Up the Processing Power of the 4ESS Switching System", BLR 62:2 Feb 1984 pgs 17-20.
     
23. "CCITT MML with Visual Display Terminals in the Modern Craft Interface for the 3B20D Computer", ISS'84 paper 13C.6.
     
24. "Introduction and Overview of the 3B Computer Family", ISS'84 paper 22A.1.
     
25. "Attached Processor for 4 ESS and 1A ESS Switches", ISS'84 paper 22A.3.
     
26. "3B20D Computer System Field Experience - The First 250 Systems", ISS'84 paper 22A.5.
     
27. "Designing for Ultrahigh Availability: The UNIX RTR Operating System", Computer Aug 1984 pgs 31-39.
     
28. "3B20D Computer: Maintenance with a Mind of Its Own", BLR 62:7 Nov 1984 pgs 16-17, 20-21.
     
29. "5ESS Switch Maintenance: Building on the Basics", BLR 62:7 Nov 1984 pgs 18-19, 21.
     
30. "Electronic Twins Protect 5ESS Switch Operations", BLR 63:3 May 1985 pgs 22-26.